This invention pertains to digital signal processing circuits in general. In particular, the present invention relates to a digital circuit for the clocked suppression of changes in a multidigit, positive or negative digital signal which have signs opposite to those of signal changes at previous instants of a clock signal.
During the processing of digital signals derived from analog signals, e.g., by means of analog-to-digital converters, disturbances superimposed on the analog signals, e.g., on the transmission path or during analog signal processing, are frequently just as disadvantageous as during the processing of the analog signals. Therefore, there is a general need for digital circuits with which such unwanted signals can be eliminated.